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Xilinx XPS IP core of the Xillybus DMA interface, configured with 4 FIFOs (two host to FPGA, two FPGA to host)
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Dragoş-Florin FROMEA / workspace_Dragos_Fromea
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Alexandru-Costin DUMITRACHE / website_Security Robot
Creative Commons Attribution Share Alike 4.0 InternationalA Security Robot designed to monitor designated areas for motion, detect obstacles in its path and displaying facial expressions.
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Mihai-Cosmin IONESCU / website-pm-sudoku
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Petru-Cristian NANIA / website-pmrust-fork
Creative Commons Attribution Share Alike 4.0 InternationalUpdated -
Gabriel-Laurenţiu LIŢĂ / website_PM_Project_Lita_Gabriel
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Matheo BUZBUCHI / website_PM_Proj
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Delia-Alexa DRĂGAN / website-music-player
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Octavian-Mihai CREŢU / Website MPA - 2025
Creative Commons Attribution Share Alike 4.0 InternationalMPA - 2025 - Octavian Cretu project description
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Alexandru DRAGOMIR / website Dragomir Alexandru
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Matei-Cristian BEJINARU / website Bejinaru Matei
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Sebastian-Mina SCROB / website-1
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Diana-Maria JUVERDEANU / website
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Raluca-Mihaela BĂIȚAN / website
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Şerban-Ionuţ ŞUGĂ / website
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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Ana-Maria BAŢAGOI / website
Creative Commons Attribution Share Alike 4.0 InternationalThe subject's website
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