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Exemple de la cursul de Structuri de Date și Algoritmi - 2018

Plugins adding HDL support in WebCAT

Board support files for the V5IP7000 ASIC prototyping platform with the Virtex-5 LX330 FPGA. Designed for use with Xilinx ISE Platform Studio

Exemple pentru cursul de Programarea Calculatoarelor, anul 2018.

Board support files for the Memec V4MB development board, with Virtex-4 LX25/LX60/SX35 FPGA. Designed for use with Xilinx ISE Platform Studio

A board-level simulator with GUI for FPGA boards, based on Xilinx Vivado Simulator.

https://github.com/ocornut/imgui/blob/master/docs/README.md Compiled statically with OpenGL backend and a demo file - as a simple Gui App framework.

Mirror of the Xilinx Linux repository.

The subject's website

vLLM scheduler simulator. Simulates batched inputs and runtime performance, without running any model, based on observed runtime performance of real runs.

Visible at https://pcom.pages.upb.ro/labs/